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cystech electronics corp. spec. no. : c705h8 issued date : 2016.11.09 revised date : page no. : 1/13 MTNN081404SH8 cystek product specification asymmetric dual n- channel enhancement mode mosfet MTNN081404SH8 tr 1 tr 2 bv dss 40v 40v i d @v gs =10v, t a =25 c 9.8a 12a features i d @v gs =10v, t c =25 c 44a 65a ? simple drive requirement r dson(typ) @v gs =10v 9.8m 6.3m ? low on-resistance r dson(typ) @v gs =4.5v 14.3m 8.0m ? fast switching speed ? pb-free lead plating and halogen-free package equivalent circuit outline ordering information device package shipping MTNN081404SH8-0-t6-g dfn 5 6 (pb-free lead plating & halogen-free package) 3000 pcs / tape & reel dfn5 6 MTNN081404SH8 pin 1 environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t3 : 2500 pcs / tape & reel, 13? reel product rank, zero for no rank products top view bottom view product name
cystech electronics corp. spec. no. : c705h8 issued date : 2016.11.09 revised date : page no. : 2/13 MTNN081404SH8 cystek product specification absolute maximum ratings (t c =25 c, unless otherwise noted) limits parameter symbol tr 1 tr 2 unit drain-source breakdown voltage bv dss 40 40 gate-source voltage v gs 20 20 v t a =25 c, v gs =10v 9.8 12 t a =70 c, v gs =10v 7.8 9.6 t c =25 c, v gs =10v 44 65 continuous drain current t c =100 c, v gs =10v i d 27.8 41 pulsed drain current (note 1 & 2) i dm 88 130 single pulse avalanche current @ l=0.1mh i as 20 40 a single pulse avalanche energy (note 4) e as 20 80 mj t a =25 c (note 3) 2.01 2.08 t a =70 c (note 3) p dsm 1.2 1.3 t c =25 c 48 69 power dissipation t c =100 c p d 19 27 w operating junction and storage te mperature range tj; tstg -55~+150 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r jc 2.6 1.8 thermal resistance, junction-to-ambient, max 62 60 thermal resistance, junction-to-ambient, max (note 3) r ja 27 25 c/w note : 1. pulse width limited by maximum junction temperature 2. duty cycle 1% 3. surface mounted on 1 in2 copper pad of fr-4 board, t 10s; 125 c/w when mounted on minimum copper pad. 4. for tr 1, 100% tested by conditions of l=0.5mh, v dd =15v, v gs =10v, i as =5a; for tr 2, 100% tested by conditions of l=0.5mh, v dd =15v, v gs =10v, i as =12a tr 1, electrical characteristics (tc=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 40 - - v gs =0v, i d =250 a v gs(th) 1.0 - 2.5 v v ds =v gs , i d =250 a i gss - - 100 na v gs =20v, v ds =0v - - 1 v ds =32v, v gs =0v i dss - - 25 a v ds =30v, v gs =0v, tj=125 c - 9.8 14 v gs =10v, i d =12a *r ds(on) - 14.3 19.5 m v gs =4.5v, i d =10a *g fs - 7.8 - s v ds =10v, i d =5a
cystech electronics corp. spec. no. : c705h8 issued date : 2016.11.09 revised date : page no. : 3/13 MTNN081404SH8 cystek product specification dynamic ciss - 708 - coss - 107 - crss - 55 - pf v ds =20v, v gs =0v, f=1mhz *td (on) - 8.4 - *tr - 13 - *td (off) - 25.6 - *tf - 7.4 - ns v ds =20v, i d =12a, v gs =10v, r g =1 *qg(v gs =10v) - 14.6 - *qg(v gs =4.5v) - 7.3 *qgs - 2 - *qgd - 4 - nc v ds =20v, i d =12a, v gs =10v body diode *v sd - 0.73 1 v v gs= 0v, i s =1a *trr - 10.8 - ns *qrr - 4.6 - nc i f =6a, di f /dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2% tr 2, electrical characteristics (tc=25c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 40 - - v gs =0v, i d =-250 a v gs(th) 1.0 - 2.5 v v ds =vgs, i d =-250 a i gss - - 100 na v gs =20v, v ds =0v - - 1 v ds =32v, v gs =0v i dss - - 25 a v ds =30v, v gs =0v, tj=125 c - 6.3 8 v gs =10v, i d =12a *r ds(on) - 8.0 12 m v gs =4.5v, i d =10a *g fs - 11.4 - s v ds =10v, i d =7a dynamic ciss - 1466 - coss - 178 - crss - 117 - pf v ds =20v, v gs =0v, f=1mhz *td (on) - 13.6 - *tr - 15.4 - *td (off) - 43.2 - *tf - 8.2 - ns v ds =20v, i d =12a, v gs =10v, r g =1 *qg(v gs =10v) - 31.2 - *qg(v gs =4.5v) - 15.9 - *qgs - 5.3 - *qgd - 7.2 - nc v ds =20v, i d =12a, v gs =10v body diode *v sd - 0.72 1 v v gs =0v, i s =1a *trr - 15 - ns *qrr - 8.2 - nc i f =12a, di f /dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2%
cystech electronics corp. spec. no. : c705h8 issued date : 2016.11.09 revised date : page no. : 4/13 MTNN081404SH8 cystek product specification recommended soldering footprint unit : mm
cystech electronics corp. spec. no. : c705h8 issued date : 2016.11.09 revised date : page no. : 5/13 MTNN081404SH8 cystek product specification typical characteristics : q1( n-channel ) typical output characteristics 0 10 20 30 40 50 012345 v ds , drain-source voltage(v) i d , drain current(a) 4v v gs =3v 3.5 v 10v, 9v, 8v, 7v, 6v, 5v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 1 10 100 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =10v v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 024681 i dr , reverse drain current(a) v sd , source-drain voltage(v) 0 tj=25c tj=150c static drain-source on-state resistance vs gate-source voltage 0 10 20 30 40 50 60 70 80 90 100 024681 0 drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =12a r ds( on) @tj=25c : 9.8m typ. v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =12a
cystech electronics corp. spec. no. : c705h8 issued date : 2016.11.09 revised date : page no. : 6/13 MTNN081404SH8 cystek product specification typical characteristics(cont.) : q1( n-channel) capacitance vs drain-to-source voltage 10 100 1000 10000 0 5 10 15 20 25 30 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.1 1 10 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) v ds =10v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 04812162 qg, total gate charge(nc) v gs , gate-source voltage(v) 0 i d =12a v ds =30v v ds =20v maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) dc 10ms 1ms 100 s r ds( on) limited t a =25c, tj=150c, v gs =10v r ja =62c/w, single pulse 1s 100ms maximum drain current vs junctiontemperature 0 2 4 6 8 10 12 25 50 75 100 125 150 175 t j , junction temperature(c) i d , maximum drain current(a) t a =25c, v gs =10v r ja =62c/w
cystech electronics corp. spec. no. : c705h8 issued date : 2016.11.09 revised date : page no. : 7/13 MTNN081404SH8 cystek product specification typical characteristics(cont.) : q1( n-channel) single pulse power rating, junction to ambient (note on page 2) 0 50 100 150 200 250 300 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t a =25c r ja =62c/w typical transfer characteristics 0 10 20 30 40 50 0123456 v gs , gate-source voltage(v) i d , drain current (a) v ds =10v transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effectivetransient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =62 c/w
cystech electronics corp. spec. no. : c705h8 issued date : 2016.11.09 revised date : page no. : 8/13 MTNN081404SH8 cystek product specification typical characteristics : q2( n-channel) typical output characteristics 0 10 20 30 40 50 012345 v ds , drain-source voltage(v) i d , drain current (a) 10v, 9v, 8v, 7v, 6v, 5v, 4v v gs =3v 3.5v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 1 10 100 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =4.5v v gs =10v source drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 02468 i s , source drain current(a) v sd , source-drain voltage(v) static drain-source on-state resistance vs gate-source voltage 0 20 40 60 80 100 120 140 160 180 200 024681 0 10 v gs =0v tj=25c tj=150c drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain-source on-state resistance v gs =10v, i d =12a r ds( on) @tj=25c : 6.3m typ. v gs , gate-source voltage(v) r ds(on) , static drain-source on-state resistance(m) i d =12a
cystech electronics corp. spec. no. : c705h8 issued date : 2016.11.09 revised date : page no. : 9/13 MTNN081404SH8 cystek product specification typical characteristics(cont.) : q2(n-channel) capacitance vs drain-to-source voltage 10 100 1000 10000 0 5 10 15 20 25 30 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.1 1 10 100 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) v ds 10v pulsed t a =25c gate charge characteristics 0 2 4 6 8 10 0 4 8 12 16 20 24 28 32 36 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =12a v ds =30v v ds =20v maximum safe operating area 0.01 0.1 1 10 100 1000 0.01 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) dc 10ms 100ms 100 s t a =25c, tj=150c, v gs =10v r ja =60c/w, single pulse 1s 1ms r ds( on) limited maximum drain current vs junction temperature 0 2 4 6 8 10 12 14 25 50 75 100 125 150 175 tj, junction temperature(c) i d , maximum drain current(a) t a =25c, v gs =10v r ja =60c/w
cystech electronics corp. spec. no. : c705h8 issued date : 2016.11.09 revised date : page no. : 10/13 MTNN081404SH8 cystek product specification typical characteristics(cont.) : q2(n-channel) single pulse power rating, junction to ambient (note on page 2) 0 50 100 150 200 250 300 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t a =25c r ja =60c/w typical transfer characteristics 0 10 20 30 40 50 012345 v gs , gate-source voltage(v) i d , drain current (a) v ds =10v transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =60c/w
cystech electronics corp. spec. no. : c705h8 issued date : 2016.11.09 revised date : page no. : 11/13 MTNN081404SH8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c705h8 issued date : 2016.11.09 revised date : page no. : 12/13 MTNN081404SH8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c705h8 issued date : 2016.11.09 revised date : page no. : 13/13 MTNN081404SH8 cystek product specification dfn5 6 dimension millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.90 1.10 0.035 0.043 f 2.55 2.90 0.100 0.114 b 0.33 0.51 0.013 0.020 h 0.61 0.81 0.024 0.032 c 0.20 0.30 0.008 0.012 i 1.10 1.30 0.043 0.051 d1 4.80 5.00 0.189 0.197 j 0.40 0.60 0.016 0.024 d2 3.61 3.96 0.142 0.156 k 0.50 - 0.020 - e 5.90 6.10 0.232 0.240 l 0.51 0.71 0.020 0.028 e1 5.70 5.80 0.224 0.228 l1 0.06 0.20 0.002 0.008 e2 2.02 2.42 0.080 0.095 0 12 0 12 e 1.27 bsc 0.050 bsc notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. marking: date code device n ame 8-lead dfn5 6 plastic package cys package code : h8 0814 04s important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .

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